| 型号 | 产品描述 | RoHS | 操作 |
|---|---|---|---|
| Allegro Package Designer | Provides a complete constraint- and rules-driven substrate layout and interconnect environment. Opti... | 立即询价 | |
| Allegro Package SI | Delivers a virtual prototyping design and simulation environment for IC packages using accurate 3D s... | 立即询价 | |
| Cadence 3D Design Viewer | Provides 3D visualization and wirebond design rule checking (DRC) for IC packages. Enables collabora... | 立即询价 | |
| Cadence SiP Co-Design | Flexible chip-package co-design methodologies with supporting utilities allow for customizable co-de... | 立即询价 | |
| Cadence SiP Digital Architect | Enables experimentation at the initial design stages for maximum functional density and performance.... | 立即询价 | |
| Cadence SiP Digital SI | Integrates digital SI analysis and interconnect extraction using SPICE-based simulation and embedded... | 立即询价 | |
| Cadence SiP Layout | Provides a complete constraint- and rules-driven substrate layout and interconnect environment. Opti... | 立即询价 | |
| Cadence Virtuoso SiP Architect | Delivers a single schematic and simulation solution for RF/analog ICs and complex IC package substra... | 立即询价 |
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